Computer Design FINAL

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There are a total of ___ ports in the PIC18.: 5 ports
True or false. All of the PIC18F458 ports have 8 pins.: FALSE
List all PIC18 ports that have 8 pins.: Port B, C and D
True or false. Upon power-up, the I/O pins are configured as output ports.: FALSE
Code a simple program to send 99H to Port B and Port C.: MOVLW 0x99
MOVWF PORTB
MOVWF PORTC
To make Port B an output port, we must place ____ in register ____.: 00, TRISB
To make Port B an input port, we must place ____ in register ______.: FFH, TRISB
True or false. The instruction \"BSF PORTB, 1\" makes pin RB1 HIGH while leaving other pins of PORTB unchanged, if bit 1 of the TRISB bits is configured for output.: TRUE
Show one way to toggle the pin RB7 continuously using PIC instructions.: BCF TRISB, 7
H1 BTG PORTB, 7
BRA H1
Using the instruction \"BTFSS PORTC, 5\" assumes that bit RC5 is an ____ (input, output) pin.: INPUT
Write instructions to toggle both bits of RD7 and RD0 continuously.: BCF TRISD, 0
BCF TRISD, 7
H2 BTG PORTD, 0
BTG PORTD, 7
BRA H2
Write the instructions to get the status of RB2 and put it on RB0.: BSF TRISB, 2
BCF TRISB, 0
AGAIN BTFSS PORTB, 2
BRA OVER
BSF PORTB, 0
BRA AGAIN
OVER BCF PORTB, 0
BRA AGAIN
In multiplication of two bytes in the PIC18, we can place one byte in register _____ and for the other one we can use value K.: WREG
In unsigned byte-by-byte multiplication, the product will be placed in register(s) _____.: PRODH and PRODL
In PIC18, the largest two numbers that can be multiplied are ____ and ____.: 255, 255
True or false. The DAW instruction works on WREG only.: TRUE
The instruction \"ADDLW K\" places the sum in ______.: WREG
Why is the following ADD instruction illegal? \"ADDLW fileReg\": Cannot mix literal value, WREG, and fileReg.
Rewrite the instruction above to add WREG to the file REG.: ADDWF fileReg, F
The instruction \"ADDWFC fileReg, W\" places the sum in _____.: WREG
Find the value of the DC and C flags in each of the following. a. MOVLW 0x4F ADDLW 0xB1 b. MOVLW 0x9C ADDLW 0x63: a. WREG=00,C=1,DC=1
b. WREG=FF,C=0,DC=0
Show how the CPU would subtract 05H from 43H.: Two\'s compliment, add together.
If C=1, WREG=95H, and fileReg=4FH prior to the execution of \"SUBFWB fileReg, F\" what will be the contents of WREG and fileReg after the subtraction?: fileReg=95H-4FH-0=46H, WREG=95H
In an 8-bit operand, bit ____ is used for the sign bit.: D7
Convert -16H to it\'s 2\'s complement representation.: EA in hex, 00010110 in binary
The range of byte-sized signed operands is -___ to +_____.: 128 to 127
Show +9 and -9 in binary.: +9=00001001
-9=11110111
Find the content of register WREG after the following code in each case: a. MOVLW 0x37 ANDLW 0xCA b. MOVLW 0x37 IORLW 0xCA c. MOVLW 0x37 ANDLW 0xCA: a. 02
b. FFH
c. FDH
To mask certain bits of the WREG, we must AND it with ____.: Zero
To set certain bits of the WREG to 1, we must OR it with ___.: One
EX-ORing an operand with itself results in ______.: All zeros
Find the contents of register WREG after execution of the following code: MOVLW 0 IORLW 0x99 XORLW 0xFF: 66H
What is the value of MYREG after the following code is executed? MYREG EQU 0x40 CLRF MYREG BSF STATUS, C RRCF MYREG, F BSF STATUS, C RRCF MYREG, F: C0H
What is in MYREG after the execution of the following code? MYREG EQU 0x40 MOVLW 0x85 MOVWF MYREG SWAPF MYREG,F: 58H
For the following decimal number, give the packed BCD and unpacked BCD representation. a. 15 b. 99: a. 15H = 0001 0101 packed BCD, 0000 0001, 0000 0101 unpacked BCD

b. 99H = 1001 1001 packed BCD, 0000 1001, 0000 1001 unpacked BCD
Show the binary and hex format for \"76\" and its BCD version.: 3736H = 00110111 00110110B
Does the WREG register have BCD data after the following instruction is executed? MOVLW D\'54\': No. We need to write it as 54H (with the H) or 01010100B to make it BCD. The value of 54 without the \"H\" is interpreted as 36H by the assembler.
67H in BCD when converted to ACSII is ___H and ____H: 36H, 37H
Does the following convert unpacked BCD in the WREG register to ACSII? MOVLW 0x09 ADDLW 0x30: Yes, because WREG = 39H
Can the programmer of a mircocontroller make up new addressing modes?: NO
Show the instruction to load 1000 0000 (binary) into register WREG.: MOVLW B\'10000000\'
Why is the \"MOVLF myvalue, fileReg\" invalid?: PIC does not allow us to move a literal value directly to file register locations.
True or false. In PIC18, the PC (program counter) is part of the SFR.: TRUE
True or false. In PIC18, the WREG is not part of the SFR.: FALSE
The instruction \"MOVWF 0x40\" uses _____ addressing mode. Why?: Direct. The memory location address is 0x40.
What address is assigned to register FSR0L?: The lower 8 bits of the 12-bit address of the data RAM file register. The address is 0FE9H.
What address is assigned to register FSR0H?: The upper 4 bits of the 12-bit address of the data RAM file register. The address is 0FEAH.
The FSRn is a(n) ___-bit register.: 12
Which registers are allowed to be used for register indirect addressing mode if the data is in the data RAM file register?: FSR0,FSR1,and FSR2
The instruction \"TBLRD*\" uses register _____ as address pointer.: TBLPTR
What register is incremented upon execution of the TBLRD* instruction?: TBLPTR
What register is holding data, once it is read by the TBLRD* instruction?: TABLAT
What is the size of TBLPTR? How much ROM space does it cover?: 21-bit, 2 MB
What register is incremented upon the execution of the TBLRD*+ instruction?: TBLPTR
What is the difference between the TBLRD*+ and TBLRD+* instructions?: In TBLRD*+ the element is read first, and then TBLPTR is incremented, while in TBLRD+*, TBLPTR is incremented first, and then the element is fetched.
True of False? The TBLWT instruction works with all ROM versions of the PIC18 family: FALSE. Only with flash ROM.
True or False? All I/O ports of the PIC18 are bit-addressable.: True
True or False? The status register of the PIC18 is bit-addressable.: True
Indicate which of the following registers are bit-addressable. a. PORTA b. PORTB c. WREG d. status register e. 21-bit PC: a, b, c, and d
Of the 4096 bytes of RAM in the PIC18, how many bytes are bit-addressable?: ALL OF THEM
How would you check to see if whether bit D1 of RAM location 3 is HIGH or LOW?: BTFSS 0x03,1
State what each instruction does. a. BSF 0x20,1 b. BCF 0x32,7 c. BSF 0x12,2 d. BSF PORTB,4 e. BSF STATUS,1: a. It sets to HIGH bit 1 of RAM location 20H
b. It clear bit 7 of RAM location 32H
c. It sets to HIGH bit 2 of RAM location 12H.
d. It set to HIGH bit 4 of PORTB
e. It sets HIGH bit 1 of status register
Show how to clear the carry flag: BCF STATUS,C
True or false. The PIC18 uses a total of 256 bytes for each bank.: TRUE
True or false. The first 128 bytes of RAM in the PIC18 are used for the access bank.: TRUE
Give the address for the upper RAM use for SFR.: F80-FFFH
Show how to put the value 99H into RAM location 202H in the PIC18.: MYREG EQU 0x2
MOVLB 0x02; load 2 into BSR (use bank 2)
MOVLW 0x99
MOVWF MYREG,1
Show how to put the value 55H into RAM location 408H in a PIC18 with 4K of RAM.: MYREG EQU 0x08
MOVLB 0x4; load 4 into BSR (use bank 4)
MOVLW 0x55; WREG=55h
MOVWF MYREG, 1
True or false. The MOVFF instruction can copy a byte from any RAM location to any other RAM location in the PIC18.: TRUE
The BSR register is a(n) ___-bit register, but only ___ bits of it are used for bank selection.: 8-bit, 4
For the following ASCII numbers, give the ASCII and packed BCD representations. a. \'5\',\'7\' b. \'9\',\'4\': The 35H and 37H give 57H in the BCD. The 39H and 34H give 94H.
Show the hex format for \"2005\" and its BCD version.: The ASCII data is 32H, 30H, 30H, 35H, while 05 and 20H are for BCD.
Does the WREG have BCD data after the following instruction is executed? Assume that the default the radix for the MPASM is decimal. MOVLW 95.: No. To make it BCD, the radix must be set to hex.
33H in he BCD when converted to ASCII is ___H and ___H.: 33H and 33H.
Find the ASCII value for the binary 11110010 if we want to display it on a computer screen as a 3-digit decimal number.: 242 or 32H, 34H and 32H.
The checksum byte for the following hex values: 88H, 99H, AAH, BBH, CCH, DDH: 88H+99H+AAH+BBH+CCH+DDH=42FH. Dropping the carries we have 2FH, and its 2\'s complement is D1H.
True or false. If we add all the bytes, including the checksum byte, and the result is FFH, there is no error in the data.: FALSE
True or False? All file register RAM locations of the PIC are bit-addressable.: TRUE

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Deck Info

Number of cards 78

Created By stargazer00742